zpuino_uart_mv_filter implements a majority voting filter
size (in bits) of the counter, the range is 0...2^bits-1
number of vote needed to set sout to '1'
signal to reset
input signal, at each rising edge of clk, a vote is counted if sin equal to '1'
output signal, equal to '1' if the number of votes is greather or equal to threshold, otherwise equal to '0'
reset the vote count to 0
If '1', the module is enabled
How it works :
A vote counter signal is initialised to 0. At each rising edge of clk, if the sin signal is equal to '1', it increments the counter.
If the counter is above threshold, the output signal is equal to '1', otherwise equal to '0'.
How to reset the vote counter :
Either set rst to '1', or clear to '1', the effect is the same.
How to pause the module :
If you set enable to '0', the module will be paused (doesn't increment the vote counter when sin is equal to '1'), the sout signal keep its value.
It's still possible to clear or reset the counter.
Date de dernière mise à jour : 12/06/2015